Reviewers’ Comments and Authors Response
Paper title: Design and Analysis of CMOS RF Receiver Front-End of LNA for Wireless Applications
Authors: Mahesh Mudavath and K Hari Kishore
The authors would like to thank the area editor and the reviewers for their precious time and invaluable comments. We have carefully addressed all the comments. The corresponding changes and refinements made in the revised paper are summarized in our response below.
Note: I rectified all comments given by the reviewer in my attached paper (camera-ready paper enclosed)
Editor and Reviewer Comments:
Comment#1: Authors should revise better and more the current literature in the field.
Responce#1: We would like to thank the reviewer for pointing out these exciting works. The Introduction and Background sections provide useful information for the readers. We rectify that in the paper. We have included the current reference paper in the revised manuscript with current literature.
This article deals the design and analysis of CMOS RF receiver front-end with the optimization of single-stage and two-stage low noise amplifier (LNA) for wireless applications. The low noise, high gain and better linearity for 3-10GHz ultra wideband (UWB) wireless applications realized in 45nm CMOS technology. The novelty of a single-ended and cascaded CMOS LNA designs for multi-standard purposeful for reconfigurable applications. Don't use plagiarised sources.Get your custom essay just from $11/page
Comment#2: Abstract is written in comprehensive manner. There are some unclear sentence, ie. GPS and so forth?
Responce#2: This is applicable for like Global Positioning System (GPS), WiFi, WLAN, Bluetooth, IoT and IoE etc. We rectify that.
Comment#3: Radiofrequency must has space-> Radio frequency
Responce#3: We would like to thank the reviewer for pointing out this. We rectify that.
Radiofrequency word changed to Radio frequency
Comment#4: Capital letters are not use properly.
Responce#4: According to your observations I made words where the capital letters are needed.
Comment#5: & must written “and”
Responce#5: I rectify the symbol & replaced with word “and”
Comment#6: Authors repeated discuss the basic concept of LNA which not important in this part, authors should focus directly on the proposed LNA.
Responce#6: I would like to explain the exact meaning of low noise amplifier then the proposed design for LNA, now I rectify the 2nd section starts with proposed design.
According to the reviewer’s instruction we have included a new section 2 Design and analysis of proposed LNA.
The proposed cascode circuit diagram of the LNA is shown in Fig. 3. It consists of 4 stages including input impedance matching stage, common source stage (CS), common gate stage (CG) and the output impedance matching stage [13] [11].
Fig. 3 Circuit diagram of the proposed LNA Circuit
The first stage of proposed LNA is input impedance matching network. It consists of inductors, capacitors and resistor has been utilized to obtain suitable value of input reflection coefficient at 3.4GHz center frequency. The signal flows through the gate of the first transistor, and the gate of the second transistor. The bias reference voltage is fixed at gate of the second transistor using the components such as inductor, capacitors and resistor such that both the transistors operate in saturation mode. The lower transistor acts as a common source amplifier, whereas the upper transistor works in the common gate configuration and also it act as isolating output nodes from input [14]. Here inductor acting as series peaking inductor between input to output. Finally the output matching stage consists of it provides output impedance matching. It is attributed to greatness such as small NF, high gain, effortlessness input-output matching, and less consumption power. The same single-stage circuit is connected as cascade for multi-stage configuration which is shown in Fig. 8 and Fig. 9.
Comment#7: Fig. 2(a)- Fig. 2(e) must be separated because no connection to each others.
Responce#7: According to reviewer comment given figures are separated and explained with the help of figures.
To analyses the input and output impedance matching of proposed LNA with the help of the small-signal model circuit is shown in Fig. 4 [15].
(a)
(b)
Fig. 4 (a) simplified small-signal circuit; (b) equivalent input matching circuit
Comment#8: Beneath equation 1 is not clear. What do you mean?
Responce#8: We would like to thank the reviewer for pointing out this. We rectify that in place of beneath equation 1 we put below given equation 1, expressed as
Comment#9: There are some grammatical errors. English must be improved.
Responce#9: We have corrected all the mentioned errors/typos in the revised manuscript. The language of the paper has been checked and the grammatical mistakes have been corrected accordingly. All abbreviations explained properly.
Comment#10: The authors should explain better the curves in Figures
Responce#10: In this case, our choice was made based on the results shown in Figures,
Comment#11: The comparison in Table I are not well discussed.
Responce#11: The comparisons in Table I is modified. We rectified that.
Comment#12: What is the novelty for the proposed LNA
Responce#12: The concept of a single-stage and two-stage CMOS LNA designs for multi-standard purposeful for reconfigurable applications such as wireless LAN and GPS has been discussed in this paper. In this proposed paper power gain and noise figure values are good. The main objective of this paper is to design the LNA of single-stage and two-stage amplifier to improve the high gain, less noise figure, better reverse isolation, and improved linearity [11].
Comment#13: Results and discussion are not well written and elaborated.
Responce#13: Results and discussion are now well written in revised manuscript.
Comment#14: There are some equations are repeated.
Responce#14: We thank the reviewer for pointing out this problem. We rectify the repeated equations.
Comment#15: The LNA circuits are not clearly explained.
Responce#15: The LNA Schematic circuits parameters and components are explained here.
The proposed cascode circuit diagram of the LNA is shown in Fig. 3. It consists of 4 stages including input impedance matching stage, common source stage (CS), common gate stage (CG) and the output impedance matching stage [13] [11].
Fig. 3 Circuit diagram of the proposed LNA Circuit
The first stage of proposed LNA is input impedance matching network. It consists of inductors, capacitors and resistor has been utilized to obtain suitable value of input reflection coefficient at 3.4GHz center frequency. The signal flows through the gate of the first transistor, and the gate of the second transistor. The bias reference voltage is fixed at gate of the second transistor using the components such as inductor, capacitors and resistor such that both the transistors operate in saturation mode. The lower transistor acts as a common source amplifier, whereas the upper transistor works in the common gate configuration and also it act as isolating output nodes from input [14]. Here inductor acting as series peaking inductor between input to output. Finally the output matching stage consists of it provides output impedance matching. It is attributed to greatness such as small NF, high gain, effortlessness input-output matching, and less consumption power. The same single-stage circuit is connected as cascade for multi-stage configuration which is shown in Fig. 8 and Fig. 9.